ryujinx/ARMeilleure/Translation
LDj3SNuD 430ba6da65
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)
* Add Pmull_V Sse fast path only, both "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test.

* Add Clmul fast path for the 128 bits variant.

* Small optimisation (save 60 instructions) for the Sse fast path about the 128 bits variant.

* Add slow path, both variants. Fix V128 Shl/Shr when shift = 0.

* A32: Add Vmull_I P64 variant (slow path); not tested.

* A32: Add Vmull_I_P8_P64 Test and fix P64 variant.
2021-01-04 23:45:54 +01:00
..
Cache PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
PTC CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
ArmEmitterContext.cs Clear JIT cache on exit (#1518) 2020-12-16 17:07:42 -03:00
Compiler.cs Clear JIT cache on exit (#1518) 2020-12-16 17:07:42 -03:00
CompilerContext.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
CompilerOptions.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
ControlFlowGraph.cs Implement block placement (#1549) 2020-09-19 20:00:24 -03:00
DelegateHelper.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
DelegateInfo.cs PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
Delegates.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
DirectCallStubs.cs Free up memory allocated by Pools during any PPTC translations at boot time. (#1814) 2020-12-24 03:58:36 +01:00
Dominance.cs Replace LinkedList by IntrusiveList to avoid allocations on JIT (#931) 2020-02-17 22:30:54 +01:00
EmitterContext.cs Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 2020-12-07 10:37:07 +01:00
GuestFunction.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
JumpTableEntryAllocator.cs PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
RegisterToLocal.cs Replace LinkedList by IntrusiveList to avoid allocations on JIT (#931) 2020-02-17 22:30:54 +01:00
RegisterUsage.cs Remove old, unused CPU optimization (#1586) 2020-09-30 16:16:34 -03:00
RejitRequest.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
SsaConstruction.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
SsaDeconstruction.cs PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
TranslatedFunction.cs Clear JIT cache on exit (#1518) 2020-12-16 17:07:42 -03:00
Translator.cs Free up memory allocated by Pools during any PPTC translations at boot time. (#1814) 2020-12-24 03:58:36 +01:00