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ryujinx/Ryujinx
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gdkchan 7d11a146c0 Generate CIL for SCVTF (vector), add undefined encodings for some instructions
2018-02-12 00:37:20 -03:00
..
Cpu
Generate CIL for SCVTF (vector), add undefined encodings for some instructions
2018-02-12 00:37:20 -03:00
Gal
aloha
2018-02-04 20:08:20 -03:00
Gpu
Fixes to memory management
2018-02-09 21:13:18 -03:00
Loaders
Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions
2018-02-09 00:26:20 -03:00
OsHle
Make HSessionObj implement IDisposable (#10)
2018-02-10 15:31:40 -03:00
Config.cs
config bugfix (#6)
2018-02-09 00:23:20 -03:00
Logging.cs
Move a few more SIMD instructions to emit CIL directly instead of a method call
2018-02-09 17:14:47 -03:00
Switch.cs
aloha
2018-02-04 20:08:20 -03:00
VirtualFs.cs
Support loading NSO/NRO without a MOD0 header, stub some functions, support more ids on SvcGetInfo
2018-02-06 20:28:32 -03:00
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