merry 7b35ebc64a

T32: Implement ALU (shifted register) instructions (#3135) ...

* T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register)

* OpCodeTable: Sort T32 list

* Tests: Rename RandomTestCase to PrecomputedThumbTestCase

* T32: Tests for AluRsImm instructions

* fix nit

* fix nit 2

2022-02-22 19:11:28 -03:00

..

Audio/Renderer

amadeus: Update to REV10 (#2654)

2021-09-19 12:29:19 +02:00

Cpu

T32: Implement ALU (shifted register) instructions (#3135)

2022-02-22 19:11:28 -03:00

Ryujinx.Tests.csproj

infra: Migrate to .NET 6 (#2829)

2021-11-28 21:24:17 +01:00

TreeDictionaryTests.cs

GPU - Improve Memory Allocation (#1722)

2020-12-09 19:26:05 -03:00