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https://github.com/starr-dusT/yuzu-mainline
synced 2024-03-05 21:12:25 -08:00
shader_ir/memory: Reduce severity of ST_L cache management and log it
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@ -387,6 +387,13 @@ enum class IpaSampleMode : u64 {
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Offset = 2,
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};
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enum class LmemStoreCacheManagement : u64 {
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Default = 0,
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CG = 1,
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CS = 2,
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WT = 3,
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};
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struct IpaMode {
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IpaInterpMode interpolation_mode;
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IpaSampleMode sampling_mode;
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@ -782,7 +789,7 @@ union Instruction {
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} ld_l;
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union {
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BitField<44, 2, u64> unknown;
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BitField<44, 2, LmemStoreCacheManagement> cache_management;
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} st_l;
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union {
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@ -8,6 +8,7 @@
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/shader_ir.h"
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@ -205,8 +206,8 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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break;
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}
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case OpCode::Id::ST_L: {
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UNIMPLEMENTED_IF_MSG(instr.st_l.unknown == 0, "ST_L Unhandled mode: {}",
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static_cast<u32>(instr.st_l.unknown.Value()));
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LOG_DEBUG(HW_GPU, "ST_L cache management mode: {}",
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static_cast<u64>(instr.st_l.cache_management.Value()));
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const auto GetLmemAddr = [&](s32 offset) {
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ASSERT(offset % 4 == 0);
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