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https://github.com/starr-dusT/yuzu-mainline
synced 2024-03-05 21:12:25 -08:00
shader: Remove IAbs64
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bc6e399ae3
commit
4397053d5c
@ -306,7 +306,6 @@ void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
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void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value);
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void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value);
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void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift);
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void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base, ScalarU32 shift);
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void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift);
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@ -82,10 +82,6 @@ void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
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ctx.Add("ABS.S {},{};", inst, value);
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}
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void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, Register value) {
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ctx.LongAdd("MOV.S64 {},|{}|;", inst, value);
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}
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void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift) {
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ctx.Add("SHL.U {}.x,{},{};", inst, base, shift);
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}
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@ -365,7 +365,6 @@ void EmitIMul32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::strin
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void EmitINeg32(EmitContext& ctx, IR::Inst& inst, std::string_view value);
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void EmitINeg64(EmitContext& ctx, IR::Inst& inst, std::string_view value);
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void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, std::string_view value);
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void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, std::string_view value);
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void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, std::string_view base,
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std::string_view shift);
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void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, std::string_view base,
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@ -80,10 +80,6 @@ void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, std::string_view value) {
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ctx.AddU32("{}=abs(int({}));", inst, value);
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}
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void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, std::string_view value) {
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ctx.AddU64("{}=abs(int64_t({}));", inst, value);
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}
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void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, std::string_view base,
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std::string_view shift) {
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ctx.AddU32("{}={}<<{};", inst, base, shift);
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@ -284,7 +284,6 @@ Id EmitIMul32(EmitContext& ctx, Id a, Id b);
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Id EmitINeg32(EmitContext& ctx, Id value);
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Id EmitINeg64(EmitContext& ctx, Id value);
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Id EmitIAbs32(EmitContext& ctx, Id value);
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Id EmitIAbs64(EmitContext& ctx, Id value);
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Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift);
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Id EmitShiftLeftLogical64(EmitContext& ctx, Id base, Id shift);
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Id EmitShiftRightLogical32(EmitContext& ctx, Id base, Id shift);
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@ -84,10 +84,6 @@ Id EmitIAbs32(EmitContext& ctx, Id value) {
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return ctx.OpSAbs(ctx.U32[1], value);
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}
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Id EmitIAbs64(EmitContext& ctx, Id value) {
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return ctx.OpSAbs(ctx.U64, value);
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}
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Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift) {
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return ctx.OpShiftLeftLogical(ctx.U32[1], base, shift);
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}
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@ -1152,15 +1152,8 @@ U32U64 IREmitter::INeg(const U32U64& value) {
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}
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}
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U32U64 IREmitter::IAbs(const U32U64& value) {
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switch (value.Type()) {
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case Type::U32:
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U32 IREmitter::IAbs(const U32& value) {
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return Inst<U32>(Opcode::IAbs32, value);
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case Type::U64:
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return Inst<U64>(Opcode::IAbs64, value);
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default:
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ThrowInvalidType(value.Type());
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}
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}
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U32U64 IREmitter::ShiftLeftLogical(const U32U64& base, const U32& shift) {
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@ -208,7 +208,7 @@ public:
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[[nodiscard]] U32U64 ISub(const U32U64& a, const U32U64& b);
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[[nodiscard]] U32 IMul(const U32& a, const U32& b);
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[[nodiscard]] U32U64 INeg(const U32U64& value);
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[[nodiscard]] U32U64 IAbs(const U32U64& value);
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[[nodiscard]] U32 IAbs(const U32& value);
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[[nodiscard]] U32U64 ShiftLeftLogical(const U32U64& base, const U32& shift);
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[[nodiscard]] U32U64 ShiftRightLogical(const U32U64& base, const U32& shift);
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[[nodiscard]] U32U64 ShiftRightArithmetic(const U32U64& base, const U32& shift);
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@ -289,7 +289,6 @@ OPCODE(IMul32, U32, U32,
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OPCODE(INeg32, U32, U32, )
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OPCODE(INeg64, U64, U64, )
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OPCODE(IAbs32, U32, U32, )
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OPCODE(IAbs64, U64, U64, )
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OPCODE(ShiftLeftLogical32, U32, U32, U32, )
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OPCODE(ShiftLeftLogical64, U64, U64, U32, )
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OPCODE(ShiftRightLogical32, U32, U32, U32, )
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