mirror of
https://github.com/starr-dusT/yuzu-mainline
synced 2024-03-05 21:12:25 -08:00
vic: Refactor frame writing methods
This commit is contained in:
parent
899fdb9c44
commit
5aae61775f
@ -16,6 +16,7 @@ extern "C" {
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}
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}
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#include "common/assert.h"
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#include "common/assert.h"
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#include "common/bit_field.h"
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#include "common/logging/log.h"
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#include "common/logging/log.h"
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#include "video_core/command_classes/nvdec.h"
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#include "video_core/command_classes/nvdec.h"
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@ -26,6 +27,25 @@ extern "C" {
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#include "video_core/textures/decoders.h"
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#include "video_core/textures/decoders.h"
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namespace Tegra {
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namespace Tegra {
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namespace {
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enum class VideoPixelFormat : u64_le {
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RGBA8 = 0x1f,
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BGRA8 = 0x20,
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RGBX8 = 0x23,
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Yuv420 = 0x44,
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};
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} // Anonymous namespace
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union VicConfig {
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u64_le raw{};
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BitField<0, 7, VideoPixelFormat> pixel_format;
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BitField<7, 2, u64_le> chroma_loc_horiz;
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BitField<9, 2, u64_le> chroma_loc_vert;
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BitField<11, 4, u64_le> block_linear_kind;
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BitField<15, 4, u64_le> block_linear_height_log2;
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BitField<32, 14, u64_le> surface_width_minus1;
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BitField<46, 14, u64_le> surface_height_minus1;
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};
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Vic::Vic(GPU& gpu_, std::shared_ptr<Nvdec> nvdec_processor_)
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Vic::Vic(GPU& gpu_, std::shared_ptr<Nvdec> nvdec_processor_)
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: gpu(gpu_),
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: gpu(gpu_),
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@ -65,145 +85,146 @@ void Vic::Execute() {
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if (!frame) {
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if (!frame) {
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return;
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return;
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}
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}
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const auto pixel_format = static_cast<VideoPixelFormat>(config.pixel_format.Value());
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switch (config.pixel_format) {
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switch (pixel_format) {
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case VideoPixelFormat::RGBA8:
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case VideoPixelFormat::BGRA8:
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case VideoPixelFormat::BGRA8:
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case VideoPixelFormat::RGBX8:
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case VideoPixelFormat::RGBX8:
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case VideoPixelFormat::RGBA8: {
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WriteRGBFrame(frame, config);
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LOG_TRACE(Service_NVDRV, "Writing RGB Frame");
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if (scaler_ctx == nullptr || frame->width != scaler_width ||
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frame->height != scaler_height) {
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const AVPixelFormat target_format = [pixel_format]() {
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switch (pixel_format) {
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case VideoPixelFormat::BGRA8:
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return AV_PIX_FMT_BGRA;
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case VideoPixelFormat::RGBX8:
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return AV_PIX_FMT_RGB0;
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case VideoPixelFormat::RGBA8:
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return AV_PIX_FMT_RGBA;
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default:
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return AV_PIX_FMT_RGBA;
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}
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}();
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sws_freeContext(scaler_ctx);
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scaler_ctx = nullptr;
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// Frames are decoded into either YUV420 or NV12 formats. Convert to desired format
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scaler_ctx = sws_getContext(frame->width, frame->height,
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static_cast<AVPixelFormat>(frame->format), frame->width,
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frame->height, target_format, 0, nullptr, nullptr, nullptr);
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scaler_width = frame->width;
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scaler_height = frame->height;
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}
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// Get Converted frame
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const u32 width = static_cast<u32>(frame->width);
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const u32 height = static_cast<u32>(frame->height);
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const std::size_t linear_size = width * height * 4;
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// Only allocate frame_buffer once per stream, as the size is not expected to change
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if (!converted_frame_buffer) {
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converted_frame_buffer = AVMallocPtr{static_cast<u8*>(av_malloc(linear_size)), av_free};
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}
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const std::array<int, 4> converted_stride{frame->width * 4, frame->height * 4, 0, 0};
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u8* const converted_frame_buf_addr{converted_frame_buffer.get()};
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sws_scale(scaler_ctx, frame->data, frame->linesize, 0, frame->height,
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&converted_frame_buf_addr, converted_stride.data());
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const u32 blk_kind = static_cast<u32>(config.block_linear_kind);
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if (blk_kind != 0) {
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// swizzle pitch linear to block linear
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const u32 block_height = static_cast<u32>(config.block_linear_height_log2);
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const auto size =
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Tegra::Texture::CalculateSize(true, 4, width, height, 1, block_height, 0);
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luma_buffer.resize(size);
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Tegra::Texture::SwizzleSubrect(width, height, width * 4, width, 4, luma_buffer.data(),
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converted_frame_buffer.get(), block_height, 0, 0);
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(), size);
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} else {
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// send pitch linear frame
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, converted_frame_buf_addr,
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linear_size);
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}
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break;
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break;
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}
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case VideoPixelFormat::Yuv420:
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case VideoPixelFormat::Yuv420: {
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WriteYUVFrame(frame, config);
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LOG_TRACE(Service_NVDRV, "Writing YUV420 Frame");
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const std::size_t surface_width = config.surface_width_minus1 + 1;
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const std::size_t surface_height = config.surface_height_minus1 + 1;
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const auto frame_width = std::min(surface_width, static_cast<size_t>(frame->width));
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const auto frame_height = std::min(surface_height, static_cast<size_t>(frame->height));
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const std::size_t aligned_width = (surface_width + 0xff) & ~0xffUL;
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const auto stride = static_cast<size_t>(frame->linesize[0]);
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luma_buffer.resize(aligned_width * surface_height);
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chroma_buffer.resize(aligned_width * surface_height / 2);
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// Populate luma buffer
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const u8* luma_src = frame->data[0];
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for (std::size_t y = 0; y < frame_height; ++y) {
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const std::size_t src = y * stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < frame_width; ++x) {
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luma_buffer[dst + x] = luma_src[src + x];
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}
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}
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(),
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luma_buffer.size());
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// Chroma
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const std::size_t half_height = frame_height / 2;
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const auto half_stride = static_cast<size_t>(frame->linesize[1]);
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switch (frame->format) {
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case AV_PIX_FMT_YUV420P: {
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// Frame from FFmpeg software
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// Populate chroma buffer from both channels with interleaving.
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const std::size_t half_width = frame_width / 2;
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const u8* chroma_b_src = frame->data[1];
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const u8* chroma_r_src = frame->data[2];
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for (std::size_t y = 0; y < half_height; ++y) {
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const std::size_t src = y * half_stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < half_width; ++x) {
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chroma_buffer[dst + x * 2] = chroma_b_src[src + x];
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chroma_buffer[dst + x * 2 + 1] = chroma_r_src[src + x];
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}
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}
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break;
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}
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case AV_PIX_FMT_NV12: {
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// Frame from VA-API hardware
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// This is already interleaved so just copy
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const u8* chroma_src = frame->data[1];
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for (std::size_t y = 0; y < half_height; ++y) {
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const std::size_t src = y * stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < frame_width; ++x) {
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chroma_buffer[dst + x] = chroma_src[src + x];
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}
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}
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break;
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}
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default:
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UNREACHABLE();
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break;
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}
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gpu.MemoryManager().WriteBlock(output_surface_chroma_address, chroma_buffer.data(),
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chroma_buffer.size());
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break;
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break;
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}
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default:
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default:
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UNIMPLEMENTED_MSG("Unknown video pixel format {:X}", config.pixel_format.Value());
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UNIMPLEMENTED_MSG("Unknown video pixel format {:X}", config.pixel_format.Value());
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break;
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break;
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}
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}
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}
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}
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void Vic::WriteRGBFrame(const AVFrame* frame, const VicConfig& config) {
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LOG_TRACE(Service_NVDRV, "Writing RGB Frame");
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if (!scaler_ctx || frame->width != scaler_width || frame->height != scaler_height) {
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const AVPixelFormat target_format = [pixel_format = config.pixel_format]() {
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switch (pixel_format) {
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case VideoPixelFormat::RGBA8:
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return AV_PIX_FMT_RGBA;
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case VideoPixelFormat::BGRA8:
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return AV_PIX_FMT_BGRA;
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case VideoPixelFormat::RGBX8:
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return AV_PIX_FMT_RGB0;
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default:
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return AV_PIX_FMT_RGBA;
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}
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}();
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sws_freeContext(scaler_ctx);
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// Frames are decoded into either YUV420 or NV12 formats. Convert to desired RGB format
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scaler_ctx = sws_getContext(frame->width, frame->height,
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static_cast<AVPixelFormat>(frame->format), frame->width,
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frame->height, target_format, 0, nullptr, nullptr, nullptr);
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scaler_width = frame->width;
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scaler_height = frame->height;
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converted_frame_buffer.reset();
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}
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// Get Converted frame
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const u32 width = static_cast<u32>(frame->width);
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const u32 height = static_cast<u32>(frame->height);
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const std::size_t linear_size = width * height * 4;
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// Only allocate frame_buffer once per stream, as the size is not expected to change
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if (!converted_frame_buffer) {
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converted_frame_buffer = AVMallocPtr{static_cast<u8*>(av_malloc(linear_size)), av_free};
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}
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const std::array<int, 4> converted_stride{frame->width * 4, frame->height * 4, 0, 0};
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u8* const converted_frame_buf_addr{converted_frame_buffer.get()};
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sws_scale(scaler_ctx, frame->data, frame->linesize, 0, frame->height, &converted_frame_buf_addr,
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converted_stride.data());
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const u32 blk_kind = static_cast<u32>(config.block_linear_kind);
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if (blk_kind != 0) {
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// swizzle pitch linear to block linear
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const u32 block_height = static_cast<u32>(config.block_linear_height_log2);
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const auto size = Texture::CalculateSize(true, 4, width, height, 1, block_height, 0);
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luma_buffer.resize(size);
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Texture::SwizzleSubrect(width, height, width * 4, width, 4, luma_buffer.data(),
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converted_frame_buffer.get(), block_height, 0, 0);
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(), size);
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} else {
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// send pitch linear frame
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, converted_frame_buf_addr,
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linear_size);
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}
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}
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void Vic::WriteYUVFrame(const AVFrame* frame, const VicConfig& config) {
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LOG_TRACE(Service_NVDRV, "Writing YUV420 Frame");
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const std::size_t surface_width = config.surface_width_minus1 + 1;
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const std::size_t surface_height = config.surface_height_minus1 + 1;
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const auto frame_width = std::min(surface_width, static_cast<size_t>(frame->width));
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const auto frame_height = std::min(surface_height, static_cast<size_t>(frame->height));
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const std::size_t aligned_width = (surface_width + 0xff) & ~0xffUL;
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const auto stride = static_cast<size_t>(frame->linesize[0]);
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luma_buffer.resize(aligned_width * surface_height);
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chroma_buffer.resize(aligned_width * surface_height / 2);
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// Populate luma buffer
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const u8* luma_src = frame->data[0];
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for (std::size_t y = 0; y < frame_height; ++y) {
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const std::size_t src = y * stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < frame_width; ++x) {
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luma_buffer[dst + x] = luma_src[src + x];
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}
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}
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(),
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luma_buffer.size());
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// Chroma
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const std::size_t half_height = frame_height / 2;
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const auto half_stride = static_cast<size_t>(frame->linesize[1]);
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switch (frame->format) {
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case AV_PIX_FMT_YUV420P: {
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// Frame from FFmpeg software
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// Populate chroma buffer from both channels with interleaving.
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const std::size_t half_width = frame_width / 2;
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const u8* chroma_b_src = frame->data[1];
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const u8* chroma_r_src = frame->data[2];
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for (std::size_t y = 0; y < half_height; ++y) {
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const std::size_t src = y * half_stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < half_width; ++x) {
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chroma_buffer[dst + x * 2] = chroma_b_src[src + x];
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chroma_buffer[dst + x * 2 + 1] = chroma_r_src[src + x];
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}
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}
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break;
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}
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case AV_PIX_FMT_NV12: {
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// Frame from VA-API hardware
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// This is already interleaved so just copy
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const u8* chroma_src = frame->data[1];
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for (std::size_t y = 0; y < half_height; ++y) {
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const std::size_t src = y * stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < frame_width; ++x) {
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chroma_buffer[dst + x] = chroma_src[src + x];
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}
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}
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break;
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}
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default:
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UNREACHABLE();
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break;
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}
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gpu.MemoryManager().WriteBlock(output_surface_chroma_address, chroma_buffer.data(),
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chroma_buffer.size());
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}
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} // namespace Tegra
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} // namespace Tegra
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@ -6,7 +6,6 @@
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#include <memory>
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#include <memory>
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#include <vector>
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#include <vector>
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "common/common_types.h"
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struct SwsContext;
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struct SwsContext;
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@ -14,6 +13,7 @@ struct SwsContext;
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namespace Tegra {
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namespace Tegra {
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class GPU;
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class GPU;
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class Nvdec;
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class Nvdec;
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union VicConfig;
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class Vic {
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class Vic {
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public:
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public:
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@ -27,6 +27,7 @@ public:
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};
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};
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explicit Vic(GPU& gpu, std::shared_ptr<Nvdec> nvdec_processor);
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explicit Vic(GPU& gpu, std::shared_ptr<Nvdec> nvdec_processor);
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~Vic();
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~Vic();
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/// Write to the device state.
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/// Write to the device state.
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@ -35,23 +36,9 @@ public:
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private:
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private:
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void Execute();
|
void Execute();
|
||||||
|
|
||||||
enum class VideoPixelFormat : u64_le {
|
void WriteRGBFrame(const AVFrame* frame, const VicConfig& config);
|
||||||
RGBA8 = 0x1f,
|
|
||||||
BGRA8 = 0x20,
|
|
||||||
RGBX8 = 0x23,
|
|
||||||
Yuv420 = 0x44,
|
|
||||||
};
|
|
||||||
|
|
||||||
union VicConfig {
|
void WriteYUVFrame(const AVFrame* frame, const VicConfig& config);
|
||||||
u64_le raw{};
|
|
||||||
BitField<0, 7, u64_le> pixel_format;
|
|
||||||
BitField<7, 2, u64_le> chroma_loc_horiz;
|
|
||||||
BitField<9, 2, u64_le> chroma_loc_vert;
|
|
||||||
BitField<11, 4, u64_le> block_linear_kind;
|
|
||||||
BitField<15, 4, u64_le> block_linear_height_log2;
|
|
||||||
BitField<32, 14, u64_le> surface_width_minus1;
|
|
||||||
BitField<46, 14, u64_le> surface_height_minus1;
|
|
||||||
};
|
|
||||||
|
|
||||||
GPU& gpu;
|
GPU& gpu;
|
||||||
std::shared_ptr<Tegra::Nvdec> nvdec_processor;
|
std::shared_ptr<Tegra::Nvdec> nvdec_processor;
|
||||||
|
Loading…
Reference in New Issue
Block a user