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https://github.com/starr-dusT/yuzu-mainline
synced 2024-03-05 21:12:25 -08:00
GPU_Async: Correct fences, display events and more.
This commit uses guest fences on vSync event instead of an articial fake fence we had. It also corrects to keep signaling display events while loading the game as the OS is suppose to send buffers to vSync during that time.
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@ -36,6 +36,10 @@ NVFlinger::NVFlinger(Core::System& system) : system(system) {
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displays.emplace_back(3, "Internal", system);
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displays.emplace_back(4, "Null", system);
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for (auto& display : displays) {
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display.SignalVSyncEvent();
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}
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// Schedule the screen composition events
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composition_event = system.CoreTiming().RegisterEvent(
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"ScreenComposition", [this](u64 userdata, s64 cycles_late) {
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@ -173,7 +177,13 @@ void NVFlinger::Compose() {
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bool trigger_event = false;
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// Trigger vsync for this display at the end of drawing
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SCOPE_EXIT({
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if (trigger_event) {
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// TODO(Blinkhawk): Correctly send buffers through nvflinger while
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// loading the game thorugh the OS.
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// During loading, the OS takes care of sending buffers to vsync,
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// thus it triggers, since this is not properly emulated due to
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// HLE complications, we allow it to signal until the game enqueues
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// it's first buffer.
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if (trigger_event || !first_buffer_enqueued) {
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display.SignalVSyncEvent();
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}
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});
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@ -193,13 +203,20 @@ void NVFlinger::Compose() {
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if (!buffer) {
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// There was no queued buffer to draw, render previous frame
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system.GetPerfStats().EndGameFrame();
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system.GPU().SwapBuffers({});
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continue;
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}
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const auto& igbp_buffer = buffer->get().igbp_buffer;
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trigger_event = true;
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first_buffer_enqueued = true;
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const auto& gpu = system.GPU();
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const auto& multi_fence = buffer->get().multi_fence;
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for (u32 fence_id = 0; fence_id < multi_fence.num_fences; fence_id++) {
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const auto& fence = multi_fence.fences[fence_id];
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gpu.WaitFence(fence.id, fence.value);
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}
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// Now send the buffer to the GPU for drawing.
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// TODO(Subv): Support more than just disp0. The display device selection is probably based
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@ -102,6 +102,8 @@ private:
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u32 swap_interval = 1;
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bool first_buffer_enqueued{};
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/// Event that handles screen composition.
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Core::Timing::EventType* composition_event;
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@ -3,6 +3,7 @@
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/microprofile.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/memory.h"
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@ -17,6 +18,8 @@
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namespace Tegra {
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MICROPROFILE_DEFINE(GPU_wait, "GPU", "Wait for the GPU", MP_RGB(128, 128, 192));
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GPU::GPU(Core::System& system, VideoCore::RendererBase& renderer, bool is_async)
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: system{system}, renderer{renderer}, is_async{is_async} {
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auto& rasterizer{renderer.Rasterizer()};
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@ -63,6 +66,16 @@ const DmaPusher& GPU::DmaPusher() const {
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return *dma_pusher;
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}
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void GPU::WaitFence(u32 syncpoint_id, u32 value) const {
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// Synced GPU, is always in sync
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if (!is_async) {
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return;
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}
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MICROPROFILE_SCOPE(GPU_wait);
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while (syncpoints[syncpoint_id].load() < value) {
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}
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}
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void GPU::IncrementSyncPoint(const u32 syncpoint_id) {
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syncpoints[syncpoint_id]++;
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std::lock_guard lock{sync_mutex};
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@ -177,6 +177,9 @@ public:
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/// Returns a reference to the GPU DMA pusher.
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Tegra::DmaPusher& DmaPusher();
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/// Allows the CPU/NvFlinger to wait on the GPU before presenting a frame.
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void WaitFence(u32 syncpoint_id, u32 value) const;
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void IncrementSyncPoint(u32 syncpoint_id);
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u32 GetSyncpointValue(u32 syncpoint_id) const;
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@ -5,8 +5,6 @@
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#include "common/assert.h"
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#include "common/microprofile.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing_util.h"
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#include "core/frontend/scope_acquire_window_context.h"
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#include "video_core/dma_pusher.h"
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#include "video_core/gpu.h"
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@ -68,14 +66,10 @@ ThreadManager::~ThreadManager() {
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void ThreadManager::StartThread(VideoCore::RendererBase& renderer, Tegra::DmaPusher& dma_pusher) {
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thread = std::thread{RunThread, std::ref(renderer), std::ref(dma_pusher), std::ref(state)};
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synchronization_event = system.CoreTiming().RegisterEvent(
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"GPUThreadSynch", [this](u64 fence, s64) { state.WaitForSynchronization(fence); });
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}
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void ThreadManager::SubmitList(Tegra::CommandList&& entries) {
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const u64 fence{PushCommand(SubmitListCommand(std::move(entries)))};
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const s64 synchronization_ticks{Core::Timing::usToCycles(std::chrono::microseconds{9000})};
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system.CoreTiming().ScheduleEvent(synchronization_ticks, synchronization_event, fence);
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PushCommand(SubmitListCommand(std::move(entries)));
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}
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void ThreadManager::SwapBuffers(const Tegra::FramebufferConfig* framebuffer) {
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@ -102,10 +96,4 @@ u64 ThreadManager::PushCommand(CommandData&& command_data) {
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return fence;
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}
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MICROPROFILE_DEFINE(GPU_wait, "GPU", "Wait for the GPU", MP_RGB(128, 128, 192));
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void SynchState::WaitForSynchronization(u64 fence) {
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while (signaled_fence.load() < fence)
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;
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}
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} // namespace VideoCommon::GPUThread
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@ -21,9 +21,6 @@ class DmaPusher;
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namespace Core {
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class System;
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namespace Timing {
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struct EventType;
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} // namespace Timing
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} // namespace Core
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namespace VideoCommon::GPUThread {
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@ -89,8 +86,6 @@ struct CommandDataContainer {
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struct SynchState final {
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std::atomic_bool is_running{true};
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void WaitForSynchronization(u64 fence);
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using CommandQueue = Common::SPSCQueue<CommandDataContainer>;
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CommandQueue queue;
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u64 last_fence{};
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@ -128,7 +123,6 @@ private:
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private:
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SynchState state;
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Core::System& system;
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Core::Timing::EventType* synchronization_event{};
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std::thread thread;
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std::thread::id thread_id;
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};
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