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https://github.com/starr-dusT/yuzu-mainline
synced 2024-03-05 21:12:25 -08:00
gl_shader_decompiler: Implement shader instruction TLDS.
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f6f6f3811e
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@ -750,6 +750,38 @@ private:
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std::string WriteTexsInstruction(const Instruction& instr, const std::string& coord,
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const std::string& texture) {
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// Add an extra scope and declare the texture coords inside to prevent
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// overwriting them in case they are used as outputs of the texs instruction.
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shader.AddLine('{');
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++shader.scope;
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shader.AddLine(coord);
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// TEXS has two destination registers. RG goes into gpr0+0 and gpr0+1, and BA
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// goes into gpr28+0 and gpr28+1
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size_t texs_offset{};
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for (const auto& dest : {instr.gpr0.Value(), instr.gpr28.Value()}) {
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for (unsigned elem = 0; elem < 2; ++elem) {
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if (!instr.texs.IsComponentEnabled(elem)) {
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// Skip disabled components
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continue;
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}
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regs.SetRegisterToFloat(dest, elem + texs_offset, texture, 1, 4, false, elem);
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}
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if (!instr.texs.HasTwoDestinations()) {
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// Skip the second destination
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break;
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}
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texs_offset += 2;
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}
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--shader.scope;
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shader.AddLine('}');
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}
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/**
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/**
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* Compiles a single instruction from Tegra to GLSL.
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* Compiles a single instruction from Tegra to GLSL.
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* @param offset the offset of the Tegra shader instruction.
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* @param offset the offset of the Tegra shader instruction.
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@ -1348,36 +1380,18 @@ private:
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr20);
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr20);
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const std::string sampler = GetSampler(instr.sampler);
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const std::string sampler = GetSampler(instr.sampler);
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const std::string coord = "vec2 coords = vec2(" + op_a + ", " + op_b + ");";
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const std::string coord = "vec2 coords = vec2(" + op_a + ", " + op_b + ");";
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// Add an extra scope and declare the texture coords inside to prevent
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// overwriting them in case they are used as outputs of the texs instruction.
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shader.AddLine("{");
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++shader.scope;
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shader.AddLine(coord);
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const std::string texture = "texture(" + sampler + ", coords)";
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const std::string texture = "texture(" + sampler + ", coords)";
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WriteTexsInstruction(instr, coord, texture);
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// TEXS has two destination registers. RG goes into gpr0+0 and gpr0+1, and BA
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break;
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// goes into gpr28+0 and gpr28+1
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}
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size_t texs_offset{};
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case OpCode::Id::TLDS: {
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const std::string op_a = regs.GetRegisterAsInteger(instr.gpr8);
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for (const auto& dest : {instr.gpr0.Value(), instr.gpr28.Value()}) {
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const std::string op_b = regs.GetRegisterAsInteger(instr.gpr20);
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for (unsigned elem = 0; elem < 2; ++elem) {
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const std::string sampler = GetSampler(instr.sampler);
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if (!instr.texs.IsComponentEnabled(elem)) {
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const std::string coord = "ivec2 coords = ivec2(" + op_a + ", " + op_b + ");";
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// Skip disabled components
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const std::string texture = "texelFetch(" + sampler + ", coords, 0)";
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continue;
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WriteTexsInstruction(instr, coord, texture);
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}
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regs.SetRegisterToFloat(dest, elem + texs_offset, texture, 1, 4, false,
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elem);
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}
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if (!instr.texs.HasTwoDestinations()) {
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// Skip the second destination
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break;
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}
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texs_offset += 2;
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}
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--shader.scope;
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shader.AddLine("}");
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break;
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break;
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}
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}
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default: {
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default: {
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