mirror of
https://github.com/starr-dusT/yuzu-mainline
synced 2024-03-05 21:12:25 -08:00
106 lines
2.6 KiB
C++
106 lines
2.6 KiB
C++
// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include "common/common_types.h"
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#include "common/log.h"
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#include "core/hw/hw.h"
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#include "core/hw/gpu.h"
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#include "core/hw/ndma.h"
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namespace HW {
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enum {
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VADDR_HASH = 0x1EC01000,
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VADDR_CSND = 0x1EC03000,
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VADDR_DSP = 0x1EC40000,
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VADDR_PDN = 0x1EC41000,
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VADDR_CODEC = 0x1EC41000,
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VADDR_SPI = 0x1EC42000,
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VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
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VADDR_I2C = 0x1EC44000,
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VADDR_CODEC_2 = 0x1EC45000,
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VADDR_HID = 0x1EC46000,
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VADDR_PAD = 0x1EC46000,
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VADDR_PTM = 0x1EC46000,
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VADDR_GPIO = 0x1EC47000,
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VADDR_I2C_2 = 0x1EC48000,
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VADDR_SPI_3 = 0x1EC60000,
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VADDR_I2C_3 = 0x1EC61000,
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VADDR_MIC = 0x1EC62000,
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VADDR_PXI = 0x1EC63000, // 0xFFFD2000
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//VADDR_NTRCARD
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VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
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VADDR_DSP_2 = 0x1ED03000,
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VADDR_HASH_2 = 0x1EE01000,
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VADDR_GPU = 0x1EF00000,
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};
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template <typename T>
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inline void Read(T &var, const u32 addr) {
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switch (addr & 0xFFFFF000) {
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// TODO(bunnei): What is the virtual address of NDMA?
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// case VADDR_NDMA:
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// NDMA::Read(var, addr);
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// break;
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case VADDR_GPU:
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GPU::Read(var, addr);
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break;
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default:
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ERROR_LOG(HW, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
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}
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}
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template <typename T>
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inline void Write(u32 addr, const T data) {
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switch (addr & 0xFFFFF000) {
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// TODO(bunnei): What is the virtual address of NDMA?
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// case VADDR_NDMA
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// NDMA::Write(addr, data);
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// break;
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case VADDR_GPU:
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GPU::Write(addr, data);
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break;
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default:
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ERROR_LOG(HW, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
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}
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}
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// Explicitly instantiate template functions because we aren't defining this in the header:
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template void Read<u64>(u64 &var, const u32 addr);
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template void Read<u32>(u32 &var, const u32 addr);
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template void Read<u16>(u16 &var, const u32 addr);
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template void Read<u8>(u8 &var, const u32 addr);
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template void Write<u64>(u32 addr, const u64 data);
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template void Write<u32>(u32 addr, const u32 data);
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template void Write<u16>(u32 addr, const u16 data);
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template void Write<u8>(u32 addr, const u8 data);
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/// Update hardware
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void Update() {
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GPU::Update();
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NDMA::Update();
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}
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/// Initialize hardware
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void Init() {
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GPU::Init();
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NDMA::Init();
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NOTICE_LOG(HW, "initialized OK");
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}
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/// Shutdown hardware
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void Shutdown() {
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NOTICE_LOG(HW, "shutdown OK");
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}
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} |